Samsung Electronics is really hoping to do well in its semiconductor division in terms of future artificial intelligence. Based on the company’s earnings projection announced on Tuesday, losses in the memory chip division of the South Korean giant are decreasing. The enhancement should direct attention towards how the $390 billion company might soon outperform market leader TSMC in the supply of AI chips. The memory chip glut in the industry is starting to decline. In the three months ending at the end of December, Samsung’s operating profit likely decreased 35% year over year to 2.8 trillion won. This is an improvement over the 78% yearly decline in the fourth quarter. Samsung’s primary source of profit, DRAM data storage chips, is primarily responsible for this.
This year, average selling prices could rise by as much as 50%, as per Citi analysts, due to reduced supply and increased demand for commodities. Due to its superior production of advanced logic chips, which are used to process data for clients like the $1.3 trillion Nvidia (NVDA.O.),. The South Korean conglomerate led by scion Jay Y. Lee has made long-term attempts to expand into the production of microprocessors. Although the business primarily produces logic chips, TSMC has invented a method that stacks the two types of chips closely together.
Additionally, Samsung is increasing the volume of logic chips it can produce and package. In its 3D packaging, Samsung vertically stacks chips on top of one another, while TSMC opts for side-by-side placement in its 2.5D packaging. In addition to manufacturing both varieties of chips on a large scale for consumers, Lee is staking his business on the ability to package them all more effectively and maybe at a lower cost. Samsung will be able to pursue a level of integration that has the potential to be revolutionary as concerns about oversupply lessen.
High-performance semiconductors with the capacity to process enormous volumes of data effectively are necessary for AI applications. The issue lies in the growing difficulty and expense of packing more transistors onto a single silicon piece. Packaging is a low-tech procedure that involves assembling chips into a container. This is becoming more and more crucial for producers of sophisticated semiconductors.
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Thanks to “Reuters“
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